Marut Raksa, Thanaporn Likitjarernkul, Kiattisak Sengchuai, Nattha Jindapetch and Krerkchai Thongnoo
Pertanika Journal of Tropical Agricultural Science, Volume 25, Issue S, February 2017
Keywords: FFT; MCSA; Sampling Frequency; Computation Reduction; FPGA
Published on: 09 May 2017
This paper presents an FFT computation minimisation for Motor Current Signature Analysis (MCSA) by reducing sampling frequencies and input data samples. The frequency resolution of an FFT signal depends on the FFT length and the sampling frequency. A diagnosis of the induction motor stator winding short turn using the FFT- based MCSA has shown the performance of various FFT lengths. Preserving frequency resolution is achieved by keeping the same ratio of the sampling frequency to the FFT length. From the experimental results, the FFT length can be decreased from 64K to 8K, 1K, and 512 points respectively. All FFT processors were implemented with Xilinx Spartan-6 FPGA to compare the resource, the speed, and the power consumption. The FPGA implementation of the 512-point FFT achieved BRAM saving of 97 %, slice saving of 26%, power consumption saving of 20% and speed up to187 times compared with the 64K-point FFT. Although the processing gain of the 512-point FFT is 24 dB and decreased from 48.1 dB in the case of the 64K-point FFT, it is enough to classify the short turn fault.
ISSN 1511-3701
e-ISSN 2231-8542